The present invention relates generally to the field of dielectric structures. In particular, the present invention relates to the field of dielectric structures suitable for use in capacitor manufacture.
Laminated printed circuit boards, as well as multichip modules, serve as support substrates for electronic components, such as integrated circuits, capacitors, resistors, inductors, and other components. Conventionally, discrete passive components, e.g. resistors, capacitors and inductors, are surface mounted to the printed circuit boards. Such discrete passive components can occupy up to 60% or greater of the real estate of a printed circuit board, thus limiting the space available for the mounting of active components, such as integrated circuits. The removal of passive components from the printed circuit board surface allows for increased density of active components, further miniaturization of the printed circuit board, increased computing power, reduced system noise and reduced noise sensitivity due to shortened leads.
Such removal of discrete passive components from the printed circuit board surface can be achieved by embedding the passive components within the laminated printed circuit board structure. Embedded capacitance has been discussed in the context of capacitive planes providing non-individual or xe2x80x9csharedxe2x80x9d capacitance. Capacitive planes consist of two laminated metal sheets insulated by a polymer based dielectric layer. Shared capacitance requires the timed use of the capacitance by other components. Such shared capacitance fails to adequately address the need for embedded capacitors that still function as discrete components.
U.S. Pat. No. 6,068,782 (Brandt et al.) discloses a method of providing individual embedded capacitors including the steps of patterning a photoimageable low dielectric constant material on top of a bottom electrode material, depositing capacitance dielectric material by either filling or partially filling the pattern, and then fabricating a capacitor top electrode. Such capacitor dielectric material typically has a high dielectric constant, such as a ceramic or metal oxide. One problem with using such ceramics or metal oxides is that they may be difficult to metallize, i.e. to fabricate an electrode on, using techniques conventionally used in the printed circuit board industry.
U.S. Pat. No. 6,180,252 B1 (Farrell et al.) discloses high energy storage devices for use in semiconductors. This patent discloses conformally coating a dielectric material on a silicon substrate where the silicon substrate is three-dimensional. In this way, the surface of the dielectric material remains smooth and not textured.
There is a need for capacitors, particularly embeddable capacitors, having high dielectric constant capacitance dielectric material that are easier to fabricate electrodes on than conventional high dielectric constant capacitance dielectric material.
It has been surprisingly found that the adhesion of plated electrode layers to high dielectric constant material can be improved by providing increased surface roughness of the dielectric material. Such increased surface roughness is preferably provided through the use of removable porogens.
The present invention provides a capacitor structure including a first conductive layer, a second conductive layer and a multilayer dielectric structure disposed between the first and second conductive layers, wherein the multilayer dielectric structure includes a first dielectric layer and a second dielectric layer, wherein the first dielectric layer has a textured surface. Preferably, the textured surface of the first dielectric layer is in intimate contact with the first conductive layer.
The present invention also provides a method of improving the adhesion of a plated conductive layer to a dielectric structure including the steps of depositing on a dielectric layer a top dielectric layer comprising porogen, removing the porogen to provide a textured surface on the top dielectric layer, and depositing a conductive layer on the textured surface of the top dielectric layer.
Additionally, the present invention provides a printed circuit board including an embedded capacitance material, wherein the embedded capacitance material includes the multilayer dielectric structure described above.
Further, the present invention provides a method of manufacturing a multilayer laminated printed circuit board including the step of embedding a capacitance material in one or more layers of the multilayer laminated printed circuit board, wherein the embedded capacitance material includes the multilayer dielectric structure described above.